Features
Conversational RTL code generation and editing
Automated bug detection and root-cause analysis
PPA optimization suggestions
Timing closure guidance and critical path analysis
Design rule checking and linting assistance
Integration with simulation and synthesis flows
Context-aware design documentation generation
Collaborative design review and annotation
Support for SystemVerilog, VHDL, and Verilog
Customizable model fine-tuning for proprietary design styles
On-prem and self-hosted deployment
Enterprise-ready security with no data egress
Drag-and-drop visual canvas with code layer mapping
AI page, theme, and component generation from prompts
Responsive auto-layout with mobile support
Multiplayer real-time collaboration with layer comments
Design system with props, slots, and variants
Export clean front-end code without AI use
CLI sync via `npx @subframe/cli sync`
AI remix variations and @mention context
Integration with Cursor and Claude Code via MCP + Skills
24-hour version history (Free), 7-day (Pro)
Personalized AI that learns your components and style
Prototype with code and annotated designs
Unlimited team members on all plans
Free viewer seats included
